1. Field of the Invention
The invention relates to peripheral controllers and methods for interfacing computers of the minicomputer class to one or more peripheral memories.
2. Description of the Background Art
Peripheral controllers-are provided to interface minicomputer central processing units (CPU's) to various numbers of disk and/or tape memories in an overall computer system. The primary objective of such peripheral controllers is to interface a plurality of peripheral memories to the host computer.
Typical host systems are provided by various well known suppliers of computer equipment including Digital Equipment Corporation. Currently, such systems are provided with a system bus structure. Peripheral memories are serviced through a peripheral I/O bus.
Interfacing peripheral memories to a system bus involves transferring data on the peripheral I/O bus and then transferring the data onto the system bus. The peripheral I/O bus provides a data path which is limited to the speed of the peripheral device. The peripheral memories are serviced in real time by the peripheral controller, and if data is supplied "late", there is a loss of performance or a loss of data. Some system buses have a high data rate, but none can guarantee transfer of time-dependent data. One approach to interfacing the two buses involves the use of static RAM buffer memories or FIFO's (first in, first out RAM memories). Use of FIFO's and data buffers has not removed the problems of system latencies which tend to limit data throughput.